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Combined display of all available logs of emmtrix Wiki. You can narrow down the view by selecting a log type, the username (case-sensitive), or the affected page (also case-sensitive).
- 22:49, 13 October 2024 Timo.stripf talk contribs created page Infineon AURIX TC2xx (Created page with "== External Links == * https://www.infineon.com/cms/en/product/microcontroller/32-bit-tricore-microcontroller/32-bit-tricore-aurix-tc2xx/ * [https://www.infineon.com/dgdl/Infineon-TC29x_B-step-UM-v01_03-EN.pdf?fileId=5546d46269bda8df0169ca1bdee424a2 TC29x B-Step User Manual] Category:Supported Architectures") Tag: Visual edit
- 18:12, 12 October 2024 Timo.stripf talk contribs moved page TriCore Instruction Set Architecture to TriCore Instruction Set Architecture
- 08:40, 12 October 2024 Timo.stripf talk contribs uploaded File:TC3xx Processor Core, Local Memory and Connectivity.png
- 08:40, 12 October 2024 Timo.stripf talk contribs created page File:TC3xx Processor Core, Local Memory and Connectivity.png
- 19:49, 11 October 2024 Timo.stripf talk contribs uploaded File:TC3xx On-Chip System Connectivity.png
- 19:49, 11 October 2024 Timo.stripf talk contribs created page File:TC3xx On-Chip System Connectivity.png
- 19:22, 11 October 2024 Timo.stripf talk contribs created page Template:rev (Created page with "<span style="border: 1px solid silver;">{{{1}}} ({{{2}}})</span>")
- 16:02, 11 October 2024 Timo.stripf talk contribs moved page Tricore Instruction Set Architecture to TriCore Instruction Set Architecture
- 08:01, 11 October 2024 Timo.stripf talk contribs created page Tricore Instruction Set Architecture (Created page with "TriCore is a unified, 32-bit microcontroller-DSP, single-core architecture optimized for real-time embedded systems. == Features == The key features of the TriCore Instruction Set Architecture (ISA) are: * • 32-bit architecture * • 4 GBytes of address space * • 16-bit and 32-bit instructions for reduced code size * • Most instructions executed in one cycle * • Branch instructions (using branch prediction) * • Low interrupt latency with fast automatic contex...") Tag: Visual edit
- 08:07, 1 October 2024 Mira.steinmetz talk contribs uploaded File:emmtrix Depenendy Analyzer xml results.png
- 08:07, 1 October 2024 Mira.steinmetz talk contribs created page File:emmtrix Depenendy Analyzer xml results.png
- 08:05, 1 October 2024 Mira.steinmetz talk contribs uploaded File:emmtrix Dependency Analyzer input.png
- 08:05, 1 October 2024 Mira.steinmetz talk contribs created page File:emmtrix Dependency Analyzer input.png
- 07:41, 1 October 2024 Mira.steinmetz talk contribs created page File:emmtrix Model Code Generator Icon.png
- 07:41, 1 October 2024 Mira.steinmetz talk contribs uploaded File:emmtrix Model Code Generator Icon.png
- 07:38, 1 October 2024 Mira.steinmetz talk contribs created page File:emmtrix Code Generator Icon.png
- 07:38, 1 October 2024 Mira.steinmetz talk contribs uploaded File:emmtrix Code Generator Icon.png
- 08:55, 30 September 2024 Mira.steinmetz talk contribs created page emmtrix Code Generator (Created page with "== Our Solution for MATLAB® Code Generation == emmtrix Code Generator (eCG) translated MATLAB®, GNU Octave, or Scilab code into platform-independent and readable C or C++ code suitable for embedded processors. The generated code was easy to understand, prepared for parallelization, and could be adjusted to individual requirements. Automatically generated reports helped with the code certification process. In combination with emmtrix Parallel Studio, eCG enabled multico...") Tag: Visual edit
- 08:48, 30 September 2024 Mira.steinmetz talk contribs uploaded File:emmtrix Code Generator Workflow.png
- 08:48, 30 September 2024 Mira.steinmetz talk contribs created page File:emmtrix Code Generator Workflow.png
- 08:17, 30 September 2024 Mira.steinmetz talk contribs uploaded File:Simulink Product Workflow.png
- 08:17, 30 September 2024 Mira.steinmetz talk contribs created page File:Simulink Product Workflow.png
- 08:10, 30 September 2024 Mira.steinmetz talk contribs created page emmtrix Model Code Generator (Created page with "== Our Solution for Simulink® == The emmtrix Model Code Generator translated your Simulink® models (''.slx) into MATLAB® or GNU Octave script files (''.m). The generated code was easy to understand and provided traceability to the original Simulink® blocks. If you wanted to convert your *.m files to C or C++, you could use our emmtrix Code Generator to complete the entire process in one tool.") Tag: Visual edit
- 09:22, 27 September 2024 Mira.steinmetz talk contribs created page File:Logical Execution Time.png
- 09:22, 27 September 2024 Mira.steinmetz talk contribs uploaded File:Logical Execution Time.png
- 09:20, 27 September 2024 Mira.steinmetz talk contribs created page File:Last Is Best.png
- 09:20, 27 September 2024 Mira.steinmetz talk contribs uploaded File:Last Is Best.png
- 09:05, 27 September 2024 Mira.steinmetz talk contribs created page Logical Execution Time (LET) (Created page with "Logical Execution Time for Control Applications The most obvious approach for parallelization or porting control software to multi-core systems is based on a last is best model that relies on shared memory and global variables. However, jitter can occur when using this approach, which results in non-deterministic runtime behaviour. Additionally, the approach has poor scalability with the number of cores. This article discusses the use of logical execution time for paral...")
- 04:29, 4 September 2024 Timo.stripf talk contribs created page Template:Demystifying C++/ToC (Created page with "<templatestyles src="Demystifying C++/styles.css"/> <div class="demystifyingcpp-toc"> <h5>Demystifying C++ Article Series</h5> ---- Main Article *Name Mangling *Classes *Virtual classes (polymorphism) *New and delete operators *Demystifying C++ - Initialization of Global Variables...")
- 04:17, 4 September 2024 Timo.stripf talk contribs created page Template:Demystifying C++/styles.css (Created page with ".demystifyingcpp-toc { border: 1px solid #a2a9b1; background-color: #f8f9fa; padding: 5px; font-size: 90%; float: right; margin: 1em 0 1em 1em; }")
- 03:50, 4 September 2024 Timo.stripf talk contribs created page Demystifying C++ (Redirected page to Demystifying C++) Tags: New redirect Visual edit: Switched
- 14:03, 14 August 2024 User account Michael.rueckauer talk contribs was created
- 14:00, 2 August 2024 Timo.stripf talk contribs moved page xcore Cheat Sheet to Eclipse Xcore Cheat Sheet without leaving a redirect
- 13:32, 2 August 2024 Timo.stripf talk contribs moved page Xcore+Cheat+Sheet to xcore Cheat Sheet without leaving a redirect
- 13:30, 2 August 2024 Timo.stripf talk contribs created page Xcore+Cheat+Sheet (Created page with "{{DISPLAYTITLE:xcore Cheat Sheet}} *https://wiki.eclipse.org/Xcore *https://www.eclipse.org/Xtext/documentation/305_xbase.html *https://www.eclipse.org/modeling/emf/docs/1.x/UG/EMF_v1.0_Users_Guide.html#s1043 ==Variables== {| class="wikitable" !Reference !Expanation |- |contains |Containment reference |- |refers |Cross reference |- |container |Container reference |} {| class="wikitable" !Flag !Expanation |- |unsettable |The variable gets an additional flag if it is set...")
- 11:06, 30 July 2024 Timo.stripf talk contribs created page emmtrix Dependency Analyzer (Created page with "The emmtrix Dependency Analyzer (eDA) analyzes C source code to extract which output signals/variables depend on which input signals/variables. == Dependency Analysis == The core dependency analysis of the eDA tool is using the C source code and an entry function (typically a runnable in an automotive application) as input. It calculates which global variables depend on each other when the function is executed. If a variable v1 depends on variable v2, the result of v1 i...") Tag: Visual edit
- 14:15, 24 May 2024 Timo.stripf talk contribs created page C to Z3 Cheat Sheet (Created page with "== Types == {| class="wikitable" |+ !C Type !Z3 Sort |- |_Bool |Bool |- |char |(_ BitVec 8) |- |short |(_ BitVec 16) |- |int |(_ BitVec 32) |- |long |(_ BitVec 64) |- |float |Float32 |- |double |Float64 |} == Type Conversion == {| class="wikitable" |+ ! !_Bool !char !short !int !long !float !double |- !_Bool | |(ite f (_ bv1 8) (_ bv0 8)) |(ite f (_ bv1 16) (_ bv0 16)) |(ite f (_ bv1 32) (_ bv0 32)) |(ite f (_ bv1 64) (_ bv0 64)) | | |- !char |(not (= f (_ bv0 8))) | |...") Tag: Visual edit
- 08:38, 23 May 2024 Timo.stripf talk contribs created page File:Infineon TC3xx Architecture.webp
- 08:38, 23 May 2024 Timo.stripf talk contribs uploaded File:Infineon TC3xx Architecture.webp
- 08:36, 23 May 2024 Timo.stripf talk contribs created page Infineon AURIX TC3xx (Created page with " == Architecture ==")
- 08:29, 23 May 2024 Timo.stripf talk contribs moved page Infineon AURIX TC4x to Infineon AURIX TC4x
- 12:37, 16 May 2024 Timo.stripf talk contribs created page File:Infineon TC4x Architecture.png
- 12:37, 16 May 2024 Timo.stripf talk contribs uploaded File:Infineon TC4x Architecture.png
- 12:26, 16 May 2024 Timo.stripf talk contribs uploaded File:Infineon Aurix TC4x.webp
- 12:26, 16 May 2024 Timo.stripf talk contribs created page File:Infineon Aurix TC4x.webp
- 12:24, 16 May 2024 Timo.stripf talk contribs created page Category:Supported Architectures (Created page with "Category:emmtrix Tools") Tag: Visual edit
- 12:23, 16 May 2024 Timo.stripf talk contribs created page Infineon AURIX TC4x (Created page with "The TC4x is Infineon's latest generation of AURIX™ microcontrollers, designed for advanced automotive applications, including eMobility, Advanced Driver Assistance Systems (ADAS), and automotive E/E (Electric/Electronic) architectures. These microcontrollers are built on a 28 nm process and feature the TriCore™ 1.8 architecture, which includes up to six cores running at speeds up to 500 MHz. This architecture is optimized for high-performance and real-time applicatio...")
- 12:04, 8 May 2024 Oliver.Wolf.EMX talk contribs created page Mapping TargetLink generated C code back to Simulink blocks (Created page with "When using TargetLink to generate C code out of Simulink models, the C code contains comments that indicate from which block the C code was generated from. In the simplest case it looks like this: <pre> Sum: MyModel/SubSystem/Sum: res = var1 + var2; </pre> The statement `res = var1 + var2;` is generated from a block `Sum` inside the `SubSystem` of `MyModel`. TargetLink tries to optimize the code by combining different statements: <pre> /* Sum: MyModel/SubSys...")
- 08:27, 6 May 2024 User account Mira.steinmetz talk contribs was created
- 11:11, 28 April 2024 Timo.stripf talk contribs created page CppStd:depr.ostrstream.cons (Created page with "{{CppStd/PageHeader|depr.ostrstream.cons}} = C++11 = {{CppStd/Header|source=https://timsong-cpp.github.io/cppwp/n3337/depr.ostrstream.cons|std=cpp11|docno=3337|page=depr.ostrstream.cons}} ==Annex D (normative) Compatibility features {{CppStd/Abbr|[depr]}}== ==={{CppStd/SecNum|D.7}} char{{*}} streams {{CppStd/Abbr|[depr.str.strstreams]}}=== ===={{CppStd/SecNum|D.7.3}} Class ostrstream {{CppStd/Abbr|[depr.ostrstream]}}==== ====={{CppStd/SecNum|D.7.3.1}} ostrstream co...")
